Voltage responsive pulse width limiting means for pulse modulation system



Feb. 11, 1969 T. N. THIELE 3, VULTAGE RESPONSIVE PULSE WIDTH LIMITINGMEANS FOR PULSE MODULATION SYSTEM Original Filed Oct. 25, 1962 T 55 W 1 w m m u W 52: $459 wTEZEmmF o L 8 S U 1E2] PZwWEDU mmEimmSZ Q United States Patent 3,427,506 VOLTAGE RESPONSIVE PULSE WIDTH LIMITING MEANS FOR PULSE MODULATION SYSTEM Tom N. Thiele, Milwaukee, Wis., assignor to Allisgivhalmers Manufacturing Company, Milwaukee,

Continuation of application Ser. No. 232,462, Oct. 23, 1962. This application Apr. 4, 1966, Ser. No. 539,924 U.S. Cl. 317-27 Claims Int. Cl. H0211 3/28, 7/00 ABSTRACT OF THE DISCLOSURE A circuit for cyclically turning on a power transistor connected between a direct current source and a direct current motor to vary the effective voltage applied to the motor has undervoltage protection means for turning off the power transistor to instantaneously terminate each on pulse whenever the voltage of the direct current source falls below a selected level at which the base drive keeps the power transistor in saturation.

This is a continuation of my copending application, Pulse Width Modulator With Pulse Width Limiting, Ser. No. 232,462, filed Oct. 23, 196 2.

This invention relates to systems that utilize pulse modulation circuits to control the effective electrical energy delivered to a direct current motor, particularly it refers to such systems that include means to limit the pulse width in response to an instantaneous low voltage condition.

One of the common ways to control the operation of a direct current motor from a power source such as a battery or a fuel cell is to connect a resistance in series with the motor and the power source. Control of the effective voltage delivered to the motor is accomplished by varying the resistance. This, however, wastes power through the resistor at less than maximum output. Therefore, systems have been devised that use a pulse producing circuit to turn a switch olf and on at rapid cyclic intervals to vary the total effective voltage applied to the direct current motor.

One of the most satisfactory ways to modulate power in an electrical system is to operate a static switch device to break up the load voltage wave form into a series of on and off pulses. Controlling the switch device for the proper relation between the on time and the off time establishes the desired average voltage at the load. In these systems it is often desirable to provide for undervoltage protection to protect the power source. One way to accomplish such protection is to provide means to open the switch, that is, shorten the on pulse, whenever the source voltage drops below a selected level. This is particularly desirable if the power switch utilizes transistors since the current and voltage in the system must be sufficient to supply base drive to operate the transistors in the switching mode Where their dissipation is low. Control should prevent the load current from exceeding the value or the voltage from falling below the level at which the available base drive keeps the transistors in saturation.

A pulse width modulating circuit can be connected to vary the pulse width in response to several inputs from the load circuit or from other circuits, and the prior art has suggested applying current limit signals to retard the turn-on point of the power stage to limit the load current. Because pulse width modulating controls of the known prior art establish only the turnon point for the power switch and thereafter lose control of the circuit until the next cycle, they do not re- 3,427,506 Patented Feb. 11, 1969 spond to electrical conditions within one period. In many instances these circuits are not satisfactory because the transistors of the power switch can burn out in a single period.

The embodiments of the invention described essentially comprise a direct current motor powered by a direct current power source and a control system that rapidly and cylically turns a transistor switch off and on to vary the elfective electrical power to the motor. The system also includes a current limiting and undervoltage limiting circuit. The undervoltage limiting circuit operates automatically to reduce the electrical energy delivered to the motor in response to a drop in instantaneous battery voltage below a desired level by instantaneously ending the on pulse when the voltage drops below the selected level.

The objects of this invention are to provide a new and improved motor control system; to provide a new and improved undervoltage responsive pulse limit means for a pulse modulation motor control system; to provide a new and improved pulse modulation control system for direct current motors; to provide a pulse modulation control system for direct current motors that includes undervoltage limiting means that directly compares a measure of the battery voltage to a selected reference voltage; to provide a pulse width modulation control system for a direct current motor utilizing a transistor power switch in the power circuit; and to provide a new and improved undervoltage limiting means for a pulse modulation system controlling a direct current motor.

Other objects and advantages will be apparent from the following detailed description of an embodiment of An associated system- FIG. 1 shows the circuit of this invention in a system that is intended to control the speed of a fork lift truck. The truck has a DC motor with an armature 10 and a series field winding 11. A power switch 12 connects the motor to a source 13 in response to a signal at the input of the power switch. Power switch 12 preferably comprises a number of power transistors connected in parallel and driver transistors connected as the single power transistor and driver are shown in FIG. 1. The truck may include a device such as an inverter 14 that is connected to source 13 to provide electrical power for accessories of the truck. Inverter 14 may be connected to provide a source of filtered DC for the pulse width modulating circuit at positive terminal 15', common terminal 16 and negative terminal 17. Inverter 14 preferably also provides full wave rectified positive unfiltered DC at terminal 18 and negative full wave rectified unfiltered DC at terminal 19. The unfiltered DC, shown in FIG. 2, provides synchronized positive and negative timing pulses for the pulse width forming circuit. The components of the system that have been described so far illustrate applications for the pulse width modulating circuit. Many other applications will be apparent after the pulse width modulating and limiting circuit has been described in connection with the specific system of FIG. 1, and other applications will be suggested later in this description.

The pulse forming circuit The pulse width modulating and limiting circuit of this invention includes a monostable circuit that establishes the position of the leading edge of a pulse with respect to a periodic reference. This part of the modulator is generally similar to part of the circuit of Thiele application Ser. No. 114,260, assigned to the assignee of this invention. The circuit includes a transistor 23 that has its emitter terminal connected to the common terminal 16 of source 14 and has its collector terminal connected to the negative terminal 17 of source 14 by a collector resistor 24. As will be explained later, transistor 23 is connected to be turned on by a timing pulse at the beginning of each period. The pulse forming circuit includes a second transistor 27 that has its emitter terminal connected to negative terminal 17 of source 14 and has its collector terminal connected to terminal 16 through a resistor 28 and the base-emitter circuit of a transistor 40 in the amplifying stage that will be described later. A capacitor 29 connects the collector terminal of transistor 23 to the base terminal of transistor 27. When transistor 23 turns on momentarily at the beginning of each period, it connects capacitor 29 to be charged to the potential of terminals 16, 17 in a circuit that comprises the emittercollector circuit of transistor 23 and the base-emitter circuit of transistor 27. When transistor 23 turns oil, very shortly after the beginning of the timing period, resistor 24 connects the positively charged terminal of capacitor 29 to the negative terminal 17, and the voltage across capacitor 29 appears between the base and emitter terminals of transistor 27 in a polarity to turn off transistor 27. An adjustable resistance circuit is connected to discharge capacitor 29 at a selected rate so that transistor 27 will turn on again after a selected time delay. The drawing illustrates the adjustable resistance circuit as the series combination of a fixed resistor 30 and a variable resistor 31 that connect the base terminal of transistor 27 to terminal 16 and a variable resistor 32 that is connected between common connection of resistors 30, 31 and positive terminal 16. Preferably variable resistor 32 is arranged to be manually adjustable to control the output of the circuit and variable resistor 31 is intended to be adjusted only to trim the circuit. At the end of the timing period when capacitor 29 has discharged to cause the base of transistor 27 to become negative with respect to the emitter, transistor 27 turns on.

The timing pulse circuit Any signal source is connected to turn transistor 23 on momentarily at the beginning of each period. In the system of FIG. 1 the full wave rectified, unfiltered, output at terminal 18 of inverter 14 provides a series of narrow negative going pulses (FIG. 2) where commutation occurs in the inverter. These voltage spikes will be called timing pulses.

The parallel combination of a resistor 35 and a capacitor 36 connect the base terminal of transistor 23 to positive unfiltered terminal 18. A resistor 37 connects the base terminal of transistor 23 to common terminal 16. Capacitor 36 and resistor 35 speed up turning on transistor 23. Also, capacitor 36 charges to an average value with the terminal connected to the base somewhat negative with respect to terminal 18 so that the base terminal of transistor goes negative during the voltage spikes although the full wave rectified form at terminal 18 does not go more negative than zero.

The amplifier A suitable circuit is connected to receive the rectangular current wave form produced in the collector circuit of transistor 27 and to receive other inputs that will be described later and to amplify these signals sufiiciently to operate power switch 12. The amplifier that the drawing illustrates comprises a transistor 40 having its emitter connected to the common terminal 16 and its collector connected to negative terminal 17 by a resistor 41. The base of transistor 40 is connected to the collector of transistor 27 of the pulse forming circuit by means of resistor 28 in the pulse forming circuit. A resistor 42 connects the base of transistor 40 to the common terminal 16 to reduce off leakage at higher temperature by providing an alternate I path. When transistor 27 turns on at the end of the timing period, transistor 40 also turns on. The parallel combination of a capacitor 45 and a resistor 46 couples the potential at the collector terminal of transistor 40 to the base terminal of a transistor 48. The collector terminal of transistor 48 is connected to the collector circuit of a transistor 50 and the emitter terminal of transistor 48 is connected to the base of transistor 50. Resistors 51, 52 connect the collector of transistor 50 to negative terminal 17, and the emitter of transistor 50 is connected to common terminal 16. R sistor 51 in the load circuit of transistor 50 keeps transistor 50 in saturation when it is turned on. Resistors 54, 55 connect the base terminals of transistors 48 and 50 to common terminal 16 to decrease the turn off time of transistors. When transistor 48 turns on, it conducts the base current for transistor 50 in its emitter-collector circuit and it turns on transistor 50. Thus, the amplifier of FIG. 1 produces a negative output at the collector terminal of transistor 50 when transistor 27 is on and it produces a zero output when the pulse forming circuit is in its unstable mode and transistor 27 is off.

The blanking circuit When transistor 23 turns on momentarily at the beginning of each timing period, it conducts in a circuit with capacitor 29 and the base-emitter junction of transistor 27 and thereby turns on transistor 27 momentarily. As the circuit has been described so far the timing pulse would appear at the output of the amplifier. Without pulse width limiting this is acceptable because transistor 27 conducts until the end of the timing period and the short timing pulse would merge with the power output pulse. As will be explained later, the pulse width limiter operates to advance the trailing edge of the pulse so that it is spaced from the point where the timing pulse would occur. Ordinarily it is undesirable to turn on power switch 12 momentarily at the timing pulse.

A capacitor 57 and a resistor 58 are connected in series across the emitter-collector terminals of transistor 23 to receive the timing pulse. During the relatively long time each period that transistor 23 is turned oil, capacitor 57 charges in series with resistor 24 and resistor 58 so that the terminal connected to the collector of transistor 23 is negative and the terminal connected to resistor 58 is positive (this is the same condition as capacitor 29). When transistor 23 turns on momentarily, it connects the negatively charged terminal of capacitor 57 to common terminal 16 so that its positively charged terminal is positive with respect to terminal 16 by the voltage source 14. This is the proper polarity to turn off transistor 40 in opposition to the collector current of transistor 27 which tends to turn on transistor 40 during the timing pulse. A diode 59 couples the positively charged terminal of capacitor 57 to the base terminal of transistor 40. Diode 59 isolates the base terminal of transistor 40 from resistor 58 and capacitor 57 except for the blanking pulse.

The pulse width limiting circuit The circuit of this invention limits the width of each pulse in response to circuit conditions during the same period. This circuit indicates the time at which a preset condition occurs and in this respect is the dual of a sample data system which indicates the value of a quantity at a preset time. The pulse width limiting circuit includes a controlled rectifier 60 that is gated at the appropriate time in the period to apply a turn oil potential to the base terminal of transistor 40, A resistor 61 connects the cathode terminal of controlled rectifier 60 to common terminal 16. A resistor 62 and a capacitor 63 are connected between the gate terminal and common terminal 16 to prevent controlled rectifier 60 from turning on in response to extraneous pulses. Suitable load means connects the anode terminal of controlled rectifier 60 to positive terminal of source 14. In the circuit of FIG. 1, the anode terminal is connected to terminal 15 through a resistor 64 and a base-emitter circuit of a transistor 65. Transistor 65 turns on when controlled rectifier 60 turns on, and it turns off when controlled rectifier 60 turns off. Transistor 65 is connected to drive an indicator lamp 66 through a resistor 67. As will be explained, lamp 66 turns on to warn the operator of the system that some load condition exists that requires pulse width limiting.

A transistor 70 is connected to apply a negative turn off pulse to the anode of controlled rectifier 60 to reset controlled rectifier 60 at the end of each period. The collector terminal of transistor 70 is connected to the anode terminal of controlled rectifier 60, and the emitter terminal of transistor 70 is connected to a suitable point of negative potential with respect to common terminal 16. The emitter terminal of transistor 70 may be connected to the common connection of two resistors 71, 72 that are connected between the terminals 16, 17 of source 14. Transistor 70 is coupled to terminal 19 of source 14 to receive positive going timing pulses by means of a capacitor 76 and two resistors 77, 78 that are similar to the timing pulse circuit already described. When transistor 70 turns on it conducts in series with resistor 64 and the base-emitter circuit of transistor 65 between positive terminal 15 and the negative common connection of resistors 71, 72. The negative potential between the two resistors 71, 72 appear at the anode terminal of controlled rectifier 60 and turns it off.

A diode 81 connects the cathode terminal of controlled rectifier 60 to the base terminal of transistor 40. Diode 59 in the blanking circuit and diode 81 form an OR circuit that turns off transistor 40 when a positive voltage is applied to the cathode of either diode 59, 81.

The overcurrent indicating section Controlled rectifier 60 is gated to limit the width of pulses in response to various circuit conditions such as the load current. With an inductive load such as windings 10, 11, the load current increases continuously during the on time (the time constant of the load is much longer than the switching period) and the load current may exceed the value at which the power switch transistors can be held in saturation, The control turns off the power switch transistors before this condition is reached. Terminal 85 of the current limiting section is connected to receive a voltage that is proportional to the load current. FIG. 1 shows a schematic resistor 86 that represents the low resistance that is distributed in the heavy conductors that connect power switch 12 to source 13. A fixed resistor 87 and a potentiometer 88 are connected across the terminals of conductor 86 to apply a measure of this voltage to the anode of a diode 89. Diode 89 conducts in series with the gate-cathode circuit of controlled rectifier 60 according to the potential at the anode of diode 89 and the volt-ampere characteristics of controlled rectifier 60 and diode 89. These voltage ampere characteristics provide that over a significant range of voltage at terminal 85, the gate voltage of controlled rectifier 60 is not sufficient to turn on the controlled rectifier. When the potential at terminal 85 rises sufiiciently (depending on the position of the slider of potentiometer 88), the voltage at the gate of controlled rectifier turns on the controlled rectifier. Thus, the voltage at the anode terminal of diode 89 that is required to turn on controlled rectifier 60 can be considered to be a reference for the collector current of the power transistor of power switch 12. When diode 89 turns on, it gates controlled rectifier. 60 which produces a voltage drop across resistor 61. Diode 81 couples the positive voltage at the cathode terminal of controlled recttifier 60 to the base terminal of transistor 40 and turns off transistor 40 and thereby turns off power switch 12.

The undervoltage indicating section A potentiometer 91 and a fixed resistor 92 are connected in series to receive a measure of the battery voltage. As the drawing illustrates the invention, a resistor 94 and a capacitor 95 are connected to decouple potentiometer 91 and resistor 92 from other components that are connected to the battery. A Zener diode 96 has its anode terminal connected to the slider of potentiometer 91 and has its cathode terminal connected by means of resistor 98 to any suitable positive potential point such as terminal 15. The slider of potentiometer 91 is adjusted so that Zener diode 96 conducts in its reverse direction when the battery has at least the minimum acceptable voltage. Zener diode 96 maintains the potential at its cathode terminal at a fixed value more positive than the slider terminal. Thus, when the slider is adjusted to be somewhat more negative than the value of the voltage across Zener diode 96, the cathode terminal is somewhat negative with respect to common terminal 16. As the battery voltage falls, the potenital at the slider and at the cathode terminal of Zener diode 96 becomes less negative with respect to terminal 16. When the slider is properly adjusted, the potential at the cathode terminal at Zener diode 96 becomes slightly positive when the battery voltage has fallen to the value at which pulse width limiting should take place. A diode 99 connects the cathode terminal of Zener diode 96 to the gate terminal of controlled rectifier '60. Diodes 89 and 99 make up an OR circuit and either low voltage or high current will turn on one of the diodes 89, 99 and gate controlled rectifier 60.

Operation Suppose that the motor is going to be energized to drive a heavy load at low speeds where the load would require more current than power switch 12 can provide safely. When the speed control potentiometer 32 is set for zero speed, the delay that is established by capacitor 29 and resistors 30, 31, 32 is longer than the period of the timing signals and capacitor 29 remains continuously charged sufficiently to turn off transistor 27 except when transistor 23 turns on in response to the timing pulse, and the blanking pulse blanks out this signal at the base of transistor 40. As the operator advances speed potentiometer 32, the circuit produces shorter and shorter delays before turn on, and the power switch turns on sooner in each period and thus remains on longer. The current in winding 10 and 11 starts at Zero or at some other value at the beginning of each turn on portion of each period and increases exponentially until power switch 12 turns off. If the power switch is turned on very early in the period and the motor is stalled or turning very slowly, the current may reach the value for which potentiometer 88 is set to gate controlled rectifier 60. When the current limit signal gates controlled rectifier 60, controlled rectifier 60 turns off amplifying transistor 40 and power switch 12 and prevents the peak load current from increasing beyond the value established by the position of the slider of potentiometer 88. If the operator attempts to apply power to the motor while it is stalled, the pulse forming circuit would advance the leading edge of the pulse and the current limit section advances the trailing edge of the pulse correspondingly. The pulse would have a uniform width that corresponds to the peak current in the load circuit. As the motor begins to move, the current limit section would retard the trailing edge of the pulse and thus widen the pulse. The operator, of course, could adjust speed control rheostat 32 to retard the leading edge of the pulse to limit the speed of the truck.

The operation of the pulse width limiting circuit during low battery voltage is similar to the current limiting operation that has just been described. When the battery is nearly discharged, its internal resistance is high and the battery voltage falls off during each period. The slider of potentiometer 91 is set so that switch 12 turns off Other embodiments As the circuit has been described so far, power switch 12 comprises transistors which are controlled either to turn on or to turn oif according to the potential at the collector of transistor 50. Transistor 40 combines all of the inputs that either turn on or turn olf power switch 12. Switch 12 can also comprise devices such as controlled rectifiers which turn on in response to a gate voltage and turn off in response to an anode voltage. For a power switch comprising controlled rectifiers, the outputs of transistor 27 and controlled rectifier 60 are separately connected to control the gate potential and the anode potential of the controlled rectifiers in power switch 12. Circuits for turning off controlled rectifiers in response to the signal at the anode of controlled rectifier 60 are well known.

The pulse limit portion of this circuit can operate with any signal that changes measurably during the on time. (If the signal does not change measurably, controlled rectifier 60 would either turn on at the beginning of a period or not turn on at all during a period.) Many devices have electrical or mechanical time constants that would cause the current or voltage to change measurably during each on time. The control can be connected to respond to nonelectrical characteristics by means of suitable sensors that produce electrical signals.

It is well known to connect transistors or controlled rectifiers or other devices to form a power switch for an alternating current system. When the pulse width modulating and limiting circuit of this invention is used in an alternating current system, it is preferable to full wave rectify a measure of the system voltage to provide timing pulses for transistors 27 and 70 at voltage zeroes in the alternating current system. This wave form is similar to the rectified square wave form of FIGS. 2A and 2B.

A very significant advantage of this circuit as it has been described so far is that all of the transistors operate in the switching mode and not in the linear mode. This feature makes the control less sensitive to variations in the voltage at terminals '15, 16, 17 and to variations in the characteristics of the transistors. Potentiometer 32 makes the circuit changes to vary the turn on point. Other resistance means such as a photocell may be substantial for the mechanically variable resistor that has been suggested. To vary the turn on point in response to electrical signals, a transistor operating in its linear mode can be connected to control the discharge of capacitor 29.

The single embodiment of the invention and the variations that have been described in detail will suggest to those skilled in the art many applications of this circuit and appropriate modifications of the disclosed circuit, which the claims are intended to cover.

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. Pulse width limiting means for a power control system that cyclically connects a direct current source to a direct current load to provide a variable average voltage to said load, said means comprising:

pulse forming means for producing a succession of pulses,

power switch means controlled by said pulses for connecting said direct current source to said direct current load,

means connected across said direct current source for providing a continuous measure at a measure point of the voltage across said direct current source;

a reference voltage source;

means connected between the reference voltage source and the measure point and responsive to the voltage difference between said point and said reference voltage source to produce an output when the instantaneous level of said voltage difference exceeds a preselected level indicating an instantaneous low voltage condition of said direct current source; and

means responsive to the output for effecting instantaneous turn-off of said power switch means.

2. Pulse width limit means according to claim 1 wherein said pulse forming means provides selectably variable pulses, said power switch means connect the direct current source to the load in response to the formed pulses for the duration of each pulse, and wherein said means responsive to the output responds to said output to turn on and connect the reference voltage source to the pulse forming means to thereby effect instantaneous turn-off of the power switch means.

3. A pulse width limit means according to claim 2 wherein said means connected between the reference voltage source and the measure point comprises a series connected impedance and voltage breakdown device with said breakdown device selected to conduct when the voltage across the breakdown device exceeds a preselected level and wherein the output is produced in the series circuit between said impedance and said breakdown device.

4. A pulse width limit means according to claim 3 wherein said breakdown device is a Zener diode connected in a reverse polarity direction and said means connected across the direct current source comprises a potentiometer having a tap as the measure point.

5. A pulse width limit means according to claim 4 wherein said means responsive to the output comprises a gate controlled switching device circuit connected to receive the output as a gating signal.

6. A pulse width limit means according to claim 5 wherein said gate controlled switching device circuit comprises a silicon controlled rectifier and means for turning off said controlled rectifier upon occurrence of another pulse.

7. A pulse width limit means according to claim 6 wherein said controlled rectifier is connected between the reference voltage source and a common connection in the pulse forming means and wherein said reference voltage is applied to said pulse forming means in a manner to instantaneously terminate the pulse.

8. A pulse width limit circuit according to claim 7 wherein the voltage of the tap is negative relative to the common connection and the voltage of the voltage reference is positive relative to said common connection.

9. A pulse width limit means according to claim 2 wherein said means responsive to the output comprises a gate controlled rectifier connected to bias the pulse forming means with the reference voltage when turned on to effect instantaneous turn-off of the power switch means and also comprises means for reverse biasing said rectifier to turn it off at the start of the next pulse.

10. A pulse width limit means according to claim 1 wherein said means connected between the reference voltage source and the measure point comprises a series connected impedance and a voltage breakdown device that conducts when the voltage across the breakdown device exceeds a preselected level and said output is produced in the series circuit between said impedance and said breakdown device.

References Cited UNITED STATES PATENTS 3,132,287 5/1964 Yarbrough 317-33 3,259,803 7/1966 Battista 31750 X 3,293,498 12/1966 Baude 3l7-50 3,295,020 12/ 1966 Borkovitz 3173 3 JOHN F. COUCH, Primary Examiner.

J. D. TRAMMELL, Assistant Examiner.

US. Cl. X.R. 

